Fpga

Building a Hardware Scan-Line Triangle Rasterizer: From Single-Pixel Core to SIMD Warp Architecture

Hardware Approaches to Floating-Point Transcendental Function Computation: CORDIC, PR-CORDIC, and LUT+Polynomial

High-Level Synthesis with C: A Practical Guide from Code to RTL

A detailed, hands-on introduction to HLS using C — understanding scheduling, pipelining, memory mapping, interfaces, and performance tradeoffs.

Designing a Simple RTL Block for ASIC vs FPGA: A Pipelined 8-bit MAC

A practical comparison of designing the same hardware block for ASIC and FPGA — architecture, RTL style, constraints, and physical implications.